Power requirements for computing devices have been increasing as they include a growing number of components that operate at higher speeds and data transfer rates, thereby drawing larger amounts of power. Many computing devices have implemented power management functions to manage the power consumption according to a particular configuration or application for the computing devices. While functional, traditional approaches to managing power have a variety of drawbacks, some of which are described next.
One approach to managing power is to mount a microcontroller or discrete logic onto a motherboard for regulating component power. A drawback to this approach is that it is relatively inflexible. In particular, this approach fixes both the power requirements of the computing device and its components at the time of manufacture. Further, this approach is relatively inflexible in that its power management capabilities are limited to processors and devices that were present when the motherboard was built. As a result, traditional power management techniques cannot readily manage the power of later-added processors and/or peripheral devices after the time of manufacturing. Another drawback is that motherboard manufacturers must generally dedicate space, power and interconnect lines to implement the microcontroller or discrete logic. Yet another drawback to this approach is that it does not provide input/output ports that can be configurable to monitor various kinds of peripheral devices that affect overall power consumption.
Another approach to managing power is to engage an operating system (“OS”) of a computing device to manage power for the motherboard. This approach relies primarily on one or more processors as well as system memory to execute instructions of a power management algorithm. A drawback to this approach is that when the processor enters an idle state, it halts execution of instructions for all programs, including those related to OS-based power management. Accordingly, OS-based power management techniques cannot readily monitor and/or modify the activity levels of devices during the time the processor is idle. Activity levels of peripheral devices and power supply devices therefore cannot be assessed or acted upon when the power management algorithm is halted. Another drawback is that OS-based power management techniques burden the processor, thereby consuming processing cycles that otherwise would be used to perform other tasks. Further, this approach usually competes with other processor priorities to acquire processor cycles, thereby hindering power management resources from responding quickly to power-related events. As such, the power management resources remain latent while the processor performs other tasks. In some cases, the power-related events are unobservable by an OS-based power management system because the power-related events occur too quickly for the processor to detect, thereby foregoing opportunities to reduce power consumption. One example of an OS-based power management scheme is set forth in the Advanced Configuration and Power Interface (“ACPI”) Specification, which is an open industry specification co-developed by various corporate entities.
In view of the foregoing, it would be desirable to provide a data path controller, a computer device, an apparatus and a method that minimizes the above-mentioned drawbacks, thereby facilitating power management by regulating operation of the components of a computing device, both individually and collectively.